Re: RTL Vs PKS
PKS ( or physical synthesis in simple) is an improvement in synthesis process that is requirment in nano-meter processes.
In old method of RTL synthesis for ASIC, in synthesis stage, the delay of interconnects between cells were estimated by wire-load method. This method is based on statitical method, and load of every driver pin is a function of its fanout and also the physical dimentions of design. But this estimations are not acceptable for nano-meter technologies.
In physical synthesis, the synthesis tool places the std. cells in synthesis stage of design, and now can it can have a better estimation for routings between nodes. This yield better estimation of loads. So the placement stage is moved from place and route to synthesis stage. This is called physical synthesis!