Whats the difference between Cadence tools ?

[kinysh]

cadence tools intro

can anyone give me an intro on cadence tools?
there is:
1) ic design
2) soc
3) ldv
what's the difference?

 

[wadaye]

Re: cadence tools intro

Hi kinysh:

The IC toolset is for custom IC design;

The SOC is a toolset for cell-based design from RTL2GDSII.

The LDV means Logic Design Verification, is the digital simulate

enviroment for verilog/vhdl/systemC. Now LDV is changed to IUS, means

Incisive Unified Simulation.

wang1

 

[edavio]

Re: cadence tools intro

ic design = virtuoso
SOC = frist encounter
LDV = NCverilog

 

[AlexWan]

Re: cadence tools intro

SOC = frist encounter
LDV = NCverilog

I think now the SOC of Cadence is for SOC encounter. It's very expensive.

LDV 5.1 has includes other tools, such as ict

 

[z81203]

Re: cadence tools intro

can anyone give me an intro on cadence tools?
there is:
1) ic design
2) soc
3) ldv
what's the difference?

1. ic is a layout editor & verification tool. for digital/analog design.
2. soc is ic placement & route tool, just like se. for digital design.
3. ldv is logic design verification tool. for digital simulation.

 

[EleApollo]

cadence tools intro

cds include ICC LDV and DSM families.
the ICC is a schematic, layout editor.
LDV id the verification tool.
DSM is the P&R and auto-layout tool.

 

[Arthurzss]

Re: cadence tools intro

SOC = frist encounter
LDV = NCverilog

I think now the SOC of Cadence is for SOC encounter. It's very expensive.

LDV 5.1 has includes other tools, such as ict

What's new in LDV 5.1?
And what is ict ?

 

[AlexWan]

Re: cadence tools intro

What's new in LDV 5.1?
And what is ict ?

A tool for code coverage: Incisive Coverage Technology.

It is very powerful for checking code coverage, including block, path, variable, expression, state, arc, and so on.

Certainly, Cadence buys it from a company.

 

[z81203]

Re: cadence tools intro

cds include ICC LDV and DSM families.
the ICC is a schematic, layout editor.

IC != ICC
most we said is IC, not ICC(IC Craftman).

 

[francx]

Re: cadence tools intro

can anyone give me an intro on cadence tools?
there is:
1) ic design
2) soc
3) ldv
what's the difference?

I think it ic design software,but also it include soc pcb .

 

[francx]

cadence tools intro

SOC = frist encounter
LDV = NCverilog

 

[AndyJing]

Re: cadence tools intro

ncverilog is goog at simulation speed,but error report is ugly

 

[gaonkc]

cadence tools intro

LDV 5.1 support verilog-2001 future. but only ncverilog support it . verilog -xl don't support it.

 

[AlexWan]

Re: cadence tools intro

ncverilog is goog at simulation speed,but error report is ugly

I think NC has good speed in pre- or post-simulation, but during RTL simulaiton, VCS and ModelSim are faster.

And the most error report should be done by lint tools in verification.

My opinion.

 

[sapaku]

cadence tools intro

Ok....im also new in this area. hope more details can be provided so i can learn faster. thank you.

 

[AlexWan]

Re: cadence tools intro

Ok....im also new in this area. hope more details can be provided so i can learn faster. thank you.

If you hope to know the detail information about the tools and the difference about different tool from different EDA vendors.

h**p://www.deepchip.com

Good Luck

 

[neiman]

Re: cadence tools intro

free Cadence training, std cell libraries, design examples can be
found at **broken link removed**

 

[HCM_bucat]

Re: cadence tools intro

Ok....im also new in this area. hope more details can be provided so i can learn faster. thank you.

If you hope to know the detail information about the tools and the difference about different tool from different EDA vendors.

h**p://www.deepchip.com

Good Luck

deepchip.com is funded by Synopsys, so they are very bias.

 

[entropy]

Re: cadence tools intro

deepchip.com is funded by Synopsys, so they are very bias.

very bias?
for example?