What will happen if we cascade two S/H circuits??

[hebu]

What will happen if we cascade two S/H circuits, and these two S/H are
with the same clock and sampling phase.

1) Frequency domain analysis

The secoond S/H will alias the image of first S/H
So, the aliasing will happen.

2) Time domain analysis

The outupt of of fisrt S/H is same as second.

What I miss?

 

[bastos4321]

What will happen if we cascade two S/H circuits, and these two S/H are
with the same clock and sampling phase.

1) Frequency domain analysis

The secoond S/H will alias the image of first S/H
So, the aliasing will happen.

2) Time domain analysis

The outupt of of fisrt S/H is same as second.

What I miss?

You will have aliasing in the first S/H. In the second no. You will have a delay in time on the secondS/H of one clock cycle. In frequence is equivalento to e^delay*s.

Bastos

 

[sunking]

yes, S/H is only a delay cell for circuit, second will have no aliasing