What will happen if the pmos is connect to vss and nmos to vdd in an inverter layout?

[chapar]

What will happen if the pmos is connect to vss and nmos to vdd in an inverter layout?

 

[siddharthshukla]

Re: inverter

both the diodes in both nmos & pmos would get forward biased and the functionality would be lost

 

[salma ali bakr]

Re: inverter

they won't work....

Vgs needs to have a certain positive value for the NMOS to work...and if the transistor drain is connected to Vdd and its source is connected to the output, then the voltage on the source is unknown and the value of Vgs isn't necessarily the voltage needed for the correct operation of the device....so it won't work

same goes for PMOS...

 

[k_90]

Re: inverter

Boom boom shake the room...

it wouldn't work!!!!

 

[deh_fuhrer]

Re: inverter

What will happen if the pmos is connect to vss and nmos to vdd in an inverter layout?

I presume that you are talking about the case where you have incidentally interchanged the nmos and pmos...
IT WILL WORK.......
sounds contradictory??
So lets be more specific, it works but not as an inverter and even not as a buffer(since output is degraded)...The output swing is only limited to the range...
|VTP| <VOUT<VDD-VTN

 

[safwatonline]

inverter

if u connect the bulks to their correct bias it will work with reduced swing. Vlow=Vthp and Vhigh=Vdd-Vthn

As a buffer , i didn't mentioned that earlier