What memory should be used for CPLD and how to implement it?

[uglyduck]

CPLD - what memory

Hello everybody,
I'm trying to build simple fuzzy controller based on Xilinx CoolRunner series CPLD. The fuzzy is somehow ok, but since I'm newbie in the field of CPLD design, I would like to ask someone more experienced: I need to use small (1-2-3 k maximum) look-up table with this CPLD (CoolRunner II or XPLA3 - not important). Can anyone suggest what memory chip to use since the CPLD have no user customizable ROM inside itself. And how to interface this memory?
/Reasons to use CPLD and not FPGA are package, price and power consumption. Plus I would like to know how to use external memories with programmable logic./
I will appreciate any help - link or simple example or even an idea on how to start.
Thank you very much.

 

[banjo]

Re: CPLD - what memory

In general, I would recommend a standard parallel addressed flash eeprom. The reason is the simple interface to extract data out. Sure, these require a large number of CPLD pins to interface it, but the logic required is much smaller than serial addressed devices.
Look at :
**broken link removed**

Here he has a Xilinx CPLD interfaced to FLASH eeprom. I think this project is no longer available, but it gives you some ideas about how to do it and links to FLASH eeprom vendors.
If you dig around on Yahoo, I think there was a user group with some sample files also.

--- Steve

Added after 38 seconds:

In general, I would recommend a standard parallel addressed flash eeprom. The reason is the simple interface to extract data out. Sure, these require a large number of CPLD pins to interface it, but the logic required is much smaller than serial addressed devices.
Look at :
**broken link removed**

Here he has a Xilinx CPLD interfaced to FLASH eeprom. I think this project is no longer available, but it gives you some ideas about how to do it and links to FLASH eeprom vendors.
If you dig around on Yahoo, I think there was a user group with some sample files also.

--- Steve

 

[shark]

CPLD - what memory

why not try to use FPGAs which include RAMs and ROMs?

 

[BuBEE]

Re: CPLD - what memory

why not try to use FPGAs which include RAMs and ROMs?

FPGA is not low price and must use Flash Prom for self config.

 

[FuzzySNR]

Re: CPLD - what memory

For a fuzzy controller implementation have a look at my publication.

**broken link removed**