Sure, I understand that, could you tell me where exactly it would fit in the SERDES system in the below diagram. I am not able to connect the two; SERDES and LVDS.
View attachment 167457
From: Design of Integrated Circuits for Optical Communications By Behzad Razavi
In between the "Retimer" and "Laser Driver", if
separate packages / dice, would be a good
application (you want high serial BW there,
that interface appears not to have any
parallel "stuff" on either side of it).
Similarly between the TIA/Limiter block and
Decision Circuit (again, if these are disjoint
physical objects).
If this is all on-chip then you might elect to
use a CML or similar, low swing high speed
but non-transmission-line format, as the
loading and length are not needing a true
tline (until some GHz anyway).