What is the purpose of creating std_logic_textio package when we have textio already?

[matrixofdynamism]

Why is there a need for std_logic_textio package to be created when we already have a textio package? Also, why is it that the VHDL standard packages do not include a function to convert std_logic_vector to string, after all this is a very basic requirement is it not?

 

[TrickyDicky]

the textio package only covers std.textio for types defined in std.standard - integer, real, bit_vector etc.
std_logic_textio was defined by synopsys (so is not a standard VHDL package) as a way to directly read/write std_logic_vectors without having to first convert to bit_vector or integer or the like, and allows you to read/write values that are not '0' or '1'.

VHDL 2008 has all of the text read/write functionality written into the std_logic_1164 package (and all the standard packages - numeric_std, fixed_pkg, float_pkg etc) , along with functions like to_string, to_hstring, to_ostring etc.

I have no idea why it was not included in the '93 standard, or even the 2002 standard. You'll have to ask the standards body..