Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What is the purpose of a power on reset circuit

Status
Not open for further replies.

ccw27

Full Member level 5
Joined
Oct 13, 2004
Messages
267
Helped
14
Reputation
28
Reaction score
6
Trophy points
1,298
Activity points
2,558
power_on_reset in 8051

What is the purpose of a power on reset circuit and how does it look like (what is its input and output)? Can someone provide a description or schematic of a typical power on reset circuit?

Thanks
 

Re: Power on Reset

This circuit ensures that a system or a device starts its operation when supply voltage stabilizes ie. riches its nominal level and stays there for some time.
Typical time is around 100ms or more. In some ICs it can be selected:100ms, 500ms et cetera.

A lot of microcontrollers use just single external capacitor with internal current source which slowly charges thas capacitor and internal voltage comparator maintains reset state till voltage on this cap riches certain point.

Nice example of such a circuit is DS1232. You can find its data sheet on MAXIM web site.
 

Re: Power on Reset

Almost all system requires a POR circuit especially uPs. It can be used everywhere with different timing threshold , but for accurate reset timing , it is very difficult.
 

Re: Power on Reset

Power On Reset : POR;

POR is user to reset the latch or flip flop when the power is on to set the normal voltage for the whole system. it can prevent the unknown level from the normal opteration.
On the other hand , it is user to slow discharge of the device when the power is down.
 

Re: Power on Reset

when power is on
reset all Dff
to sure the circuit performance
 

Re: Power on Reset

Here's a simple Power-On Reset circuit, if the required reset is active low. Most microcontrollers use an active low reset. Should a microcontroller requires an active high reset, simply swap V+ and 0V.

All digtial systems, including microcontrollers require a startup or initial time to initialise and stablise subsystems present in them. In general, we collectively called these as latency. The same way when you press the button to cool boot a computer system.
 

Re: Power on Reset

look at maxim for datasheet and application
 

Power on Reset

Yes, use a Maxim or similar chip. Simple RC reset circuits usually misbehave during brief power dips.
 

Re: Power on Reset

Purpose of POR circuit is to delay start of operation of a device after switch on until supply voltage reaches it's nominal value and stabilizes. It is needed to prevent erratic or uncontrolled operation during transition period after switching on. When this time passes MCU starts from reset.
 

Re: Power on Reset

Another simple,cheap and used Power on Reset chip is the Mitsubishi M51953.

The output of a Power on Reset chip goes high when the voltage at its input
reaches a specified value. For example, in the case of the M51953 the output goes high when its input reaches 4.25V (supposing to supply the chip whit 5V)
The time that the output is low before going to high level is set by an external capacitor.

On the opposite side, the output goes low when you turn off the supply and the voltage goes under the 4,25V.

So, the main function of a Power on Reset chip is well described by Borber post.
Another application, but during power off, is to sense when the voltage supply
is turned off. You can use this function, for example, to put audio amplifier in mute state when you turn off the power supply. In this case you can avoid "bump" noise on the speaker system.

Regards
 

Re: Power on Reset

Basic principle of a power-on reset circuit would be to reset all the
latches and flip-flops and other multi-state elements in the system
to known state after a definite amount of time after power on of
the system.

Design principle would be to disable all the multi-state elements
in the system at power up, use a current source which functions over
a wide range of power supply to charge a capacitor. When the
capacitor voltage reaches a pre-deteremined limit, reconnize it
by a comparator and reset all the multi-state elements in the system
and let the system begin operation in the normal mode.

A current source and some amount of logic circuitry
would do the above job.
 

Re: Power on Reset

When power is on, some curent charge the capacitor and the voltage of capacitor increases slowly. At the beginning, the voltage is lower than some threshold voltage and all elements in the system is reset. And then , the voltage is higher than that threshold voltage ,the reset function is off . After that POR circuit is unused. The threshold volatage can be determined by some comparator, Schmitt
flip-flop,and even some gate circuit.
 

Re: Power on Reset

Can anyone provide an example of how a POR signal looks like, i.e. its rise time, fall time, pulse width, etc. I am trying to model such signal using a pulse generator in cadence.

Thanks
 

Power on Reset

POR, just a simple RC circuit to give some time delay on the reset pins of IC to reach its active hi/lo.
 

Re: Power on Reset

Microchip has a great (short) paper on this at their website.

A.T.B
 

Power on Reset

I think it is made with TTL circuits.When a signal come ,the circuit operate.
 

Re: Power on Reset

for POR and Hot plugging take a look at MAXIM IC,
 

Re: Power on Reset

It is often required that on-chip POR consumes low currents.
Notice simple RC POR might problematic if the power ramped too slowly.
 

Re: Power on Reset

What simulations should you perform to verify that your POR will work after fabrication? Different Vdd rising time, different process, voltage and temperature corner. Is that enough?

Thanks
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top