What is the notion of "core" in chip physic design?

[scscsc]

Hi,

I have a question of floorplan. In top chip layout when we define a core and its dimension in the command "floorplan", does it mean all the cells (IPs, standard cells, analog instances...) should be placed inside? There is only something like power rings, pad rings, wire connections outside the core?

My design is mainly digital, but with some small analog instances. Can I put all the digital part inside the core, create a digital power ring around the core, and place the analog instances outside the power ring? What is the usual way of placement for mixed circuit like this?

Thanks

 

[wipshami]

Re: The notion of "core" in chip floorplan

Core means everything other than IO..I think what you have mentioned is the right way of mixing digital and analog..you may require guard ring for the analog to shield it from digital block