Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
The negative time is in library or sdf from p&r?
If negative time is in library, you don't care about it. it is becase that some path of the cell is slow, so some time is negative.
The negative is native delay so don't care about it.