Hello there,
The PLL can be used to multiple up the clock input to make your device run faster – of course this also means it uses more power.
A phase-locked loop (PLL) is a closed-loop frequency-control system based on the phase difference between the input clock signal and the feedback clock signal of a controlled oscillator.
Phase-locked loops are widely used for synchronization purposes; in space communications for coherent demodulation and threshold extension, bit synchronization, and symbol synchronization. Phase-locked loops can also be used to demodulate frequency-modulated signals. In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency.
Other applications include:
1.Demodulation of both FM and AM signals
2.Recovery of small signals that otherwise would be lost in noise (lock-in amplifier)
3.Recovery of clock timing information from a data stream such as from a disk drive
4.Clock multipliers in microprocessors that allow internal processor elements to run faster than external connections, while maintaining precise timing relationships
5.DTMF decoders, modems, and other tone decoders, for remote control and telecommunications
6.DSP of video signals; Phase-locked loops are also used to synchronize phase and frequency to the input analog video signal so it can be sampled and digitally processed
Clock generation
Many electronic systems include processors of various sorts that operate at hundreds of megahertz. Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor. The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz.
Yes. ARM controllers supports PLL concept.
Best regards,