what is the inputs and outputs of floorplan and power plan?

Status
Not open for further replies.
Re: what is the inputs and outputs of floorplan and power pl

hi vamsi,

inputs to floorplan,

verilog netlist
SDC file
Cells physical information (LEF)
Macro Glassbox(in case of magma)

outputs
verilog netlist
Design DEF file

Inputs to Powerplan
Verilog netlist
DEF file
Cells physical information (LEF)
Macro Glassbox(in case of magma)
Rings/Straps/Rows information

outputs
verilog netlist
Design DEF file

happy designing
chip design made easy
https://www.vlsichipdesign.com
 

Status
Not open for further replies.

Similar threads

Menu
Log in
Register
Cookies are required to use this site. You must accept them to continue using the site. Learn more…