leongch
Member level 2
hi,
i am trying to do the a frequency divider by 2 by using the DflipFlop
The design just simple where the output of the DflipFlop is feedback to input of the DFF... While i run the compilation the ALTERA QuartusII not allow the input to be feed directly from the output. Anyway to solve this kinda problem? Thanks
Oh... by VHDL ... [/img]
i am trying to do the a frequency divider by 2 by using the DflipFlop
The design just simple where the output of the DflipFlop is feedback to input of the DFF... While i run the compilation the ALTERA QuartusII not allow the input to be feed directly from the output. Anyway to solve this kinda problem? Thanks
Oh... by VHDL ... [/img]