Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I want to correct here that it is serpentine routing and the routing I mentioned earlier is trombone (is also a technique used for length matching) and not tombstone (a typo).
the image contains serpentine routing as mentioned by popoyboys
hai, assume you have 8 databus processor, in that except d0 all others are more longer. Then to match the speed of the data d7 and d0, you need to do like this zigzag, then only all the data buses will come to same length,