What is the difference between ASIC flow and FPGA flow ?

[venu pradeepa]

ASIC & FPGA

hi,

what is diff b/w ASIC flow and FPGA flow ?

 

[javad]

Re: ASIC & FPGA

Read this article:
**broken link removed**

(specially see the figure 1)

 

[manik_vivek_82]

Re: ASIC & FPGA

Hi,
In some FPGAs, the technology mapping stage is reffered to as fitting..

 

[Kulprashant]

ASIC & FPGA

hi,
fpga can be reusable and asic can be not reusable.

with regards,
kul.

 

[soccer]

ASIC & FPGA

asic flow: design->verification->sythesis->P&R->fabricate

fpga flow:
design->verification->sythesis->mapping macrocells

 

[cedance]

Re: ASIC & FPGA

this has been a hot topic under discussion then and there.. hope these links also wud prove helping to u.









/cedance

 

[power-twq]

Re: ASIC & FPGA

The ASIC flow is:

specification design ---> architecture design ----> rtl design ----- >

verification ------ > logic synthesis ------> place & route ------ > GDSII

-------> manufacture


The FPGA flow is

specification design ---> architecture design ----> rtl design ----- >

verification ------ > logic synthesis ------> fit

hi,

what is diff b/w ASIC flow and FPGA flow ?