What is the address of an I2C EEPROM ?

[expelleior]

Hi,
I have nt used I2C before and need someone to help! I have connected a second EEPROM to the one that I use to download a program to the microcontroller.

My question is quite naive. How do I address it and what part do the pins A0,A1,A2 play. What part does the unique address that is built in at time of manufacture and how does that assist me ?

The first EEPROM has all A0,A1,A2 pulled to ground. I think its addressed at 000

I have the second EEPROM connected to SCL and SDA and the pin A0 is pulled high because I think it must be hardwired unique on pins A0,A1,A2.

Am I correct ? What would the address of the second EEPROM be ?

Thanks.

 

[IanP]

See EEProm Address table below ..

Let’s take the 24C02 as an example ..

If A2=A1=A0=0:

EEprom Read Address:

1 0 1 0 A2 A1 A0 1 => A1h

EEprom Write Addess:

1 0 1 0 A2 A1 A0 0 => A0h


If A2=A1=0 and A0=1:

EEprom Read Address:

1 0 1 0 A2 A1 A0 1 => A3h

EEprom Write Addess:

1 0 1 0 A2 A1 A0 0 => A2h

Rgds,
IanP

 

[expelleior]

Thanks for that. It has me confused I have a 24LC256 EEPROM. I will download and read through the datasheet. From what I understand the control bit must be set to 1010 for a 24LC256 EEPROM and the A0..A2 must coresspond to how you have it wired. and then this

Upon receiving a ‘1010’ code and appropriate
device select bits, the slave device outputs an
Acknowledge signal on the SDA line. Depending on the
state of the R/W bit, the 24XX256 will select a read or
write operation.

I'll read up and see if I can.

Added after 36 minutes:

The code below is what I am having trouble understanding. The pins for SCL and SDA are 28 nd 29. In the CON block EEPROM = $A0 , whats that about ?

CON
   ACK      = 0                        ' I2C Acknowledge
   NAK      = 1                        ' I2C No Acknowledge
   Xmit     = 0                        ' I2C Direction Transmit
   Recv     = 1                        ' I2C Direction Receive
   BootPin  = 28                       ' I2C Boot EEPROM SCL Pin
   EEPROM   = $A0                      ' I2C EEPROM Device Address

PUB Initialize(SCL) | SDA              ' An I2C device may be left in an
   SDA := SCL + 1                      '  invalid state and may need to be
   outa[SCL] := 1                       '   reinitialized.  Drive SCL high.
   dira[SCL] := 1
   dira[SDA] := 0                       ' Set SDA as input
   repeat 9
      outa[SCL] := 0                    ' Put out up to 9 clock pulses
      outa[SCL] := 1
      if ina[SDA]                      ' Repeat if SDA not driven high
         quit                          '  by the EEPROM

PUB Start(SCL) | SDA                   ' SDA goes HIGH to LOW with SCL HIGH
   SDA := SCL + 1
   outa[SCL]~~                         ' Initially drive SCL HIGH
   dira[SCL]~~
   outa[SDA]~~                         ' Initially drive SDA HIGH
   dira[SDA]~~
   outa[SDA]~                          ' Now drive SDA LOW
   outa[SCL]~                          ' Leave SCL LOW
  
PUB Stop(SCL) | SDA                    ' SDA goes LOW to HIGH with SCL High
   SDA := SCL + 1
   outa[SCL]~~                         ' Drive SCL HIGH
   outa[SDA]~~                         '  then SDA HIGH
   dira[SCL]~                          ' Now let them float
   dira[SDA]~                          ' If pullups present, they'll stay HIGH

PUB Write(SCL, data) : ackbit | SDA
'' Write i2c data.  Data byte is output MSB first, SDA data line is valid
'' only while the SCL line is HIGH.  Data is always 8 bits (+ ACK/NAK).
'' SDA is assumed LOW and SCL and SDA are both left in the LOW state.
   SDA := SCL + 1
   ackbit := 0 
   data <<= 24
   repeat 8                            ' Output data to SDA
      outa[SDA] := (data <-= 1) & 1
      outa[SCL]~~                      ' Toggle SCL from LOW to HIGH to LOW
      outa[SCL]~
   dira[SDA]~                          ' Set SDA to input for ACK/NAK
   outa[SCL]~~
   ackbit := ina[SDA]                  ' Sample SDA when SCL is HIGH
   outa[SCL]~
   outa[SDA]~                          ' Leave SDA driven LOW
   dira[SDA]~~

PUB Read(SCL, ackbit): data | SDA
'' Read in i2c data, Data byte is output MSB first, SDA data line is
'' valid only while the SCL line is HIGH.  SCL and SDA left in LOW state.
   SDA := SCL + 1
   data := 0
   dira[SDA]~                          ' Make SDA an input
   repeat 8                            ' Receive data from SDA
      outa[SCL]~~                      ' Sample SDA when SCL is HIGH
      data := (data << 1) | ina[SDA]
      outa[SCL]~
   outa[SDA] := ackbit                 ' Output ACK/NAK to SDA
   dira[SDA]~~
   outa[SCL]~~                         ' Toggle SCL from LOW to HIGH to LOW
   outa[SCL]~
   outa[SDA]~                          ' Leave SDA driven LOW

 

[johnnykhor]

hi all,

I am new to I2C too, and i found a slides which quite useful (for me) and i would like to post it to share with others who new to I2C.

and i have a question too, is all the slave (EEPROM) has their own address of storing data?

in order to get the data, we must use the MASTER point to the address (EEPROM) to get it?

please advice, thanks in advance.

 

[microKernel]

for I2C slave you do need a master to read and write to the slave. Each slave has its own address and so each EEPROM will have. For a certain EEPROM , some of the bits in address are fixed and some are left open to facilitate integrating multiple IC of that EEPROM.

e.g. in IanP and expelleior's example 1010 is the fixed code while A2 A1 A0 are left open that will be derived from wiring. For first EEPROM, A2 A1 A0 will be 000 so address will be 1010000. Doing so allows you to interface 8 EEPROM chips of the same kind in one application.