What is the acceptable OPA phase margin ?

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samuel

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when I simulate the OPA phase margin , It results about -108. Is is correct?
thanks, sm.
 
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Re: about phase margin

Sorry to say, but no, it`s not good.

@ unity gain you must have a certain margin in phase in order to maintain stability.
I have heard many people say 45 deg is the magic number, but I usually aim for about 60 deg.
Lets take 60 deg as an example.
You need to have a margin of 60 deg or more from the nearest multiple of 180 deg @ unity gain freq.
You should be at about -120 deg. Also, depending on the application, a phase reversal might be bad as well.

If you tell me what topology of OTA you are implementing, maybe I can tell you how to improve phase margin.

Hope this helps.
 

Re: about phase margin

i feel there is something wrong with simulation setup..Usually we try to measure phasemargin for -ve f/b loop...I assume you are feeding ac signal in the negative feedback loop..so at dc itself output is inverted i.e 180' phaseshift,but you are saying PM=-180' which means there is around 360' phaseshift by the loop..in this case loop becomes positive and system becomes unstable...

please correct if i am wrong...
rampat
 

Re: about phase margin

sorry, It results about -108 not -180. is it correct?
 

Re: about phase margin

Oh... in that case it`s fine.
The amplifier will be stable, with a phase margin of 72 deg @ unity gain.
The problem is that a big phase margin usually means less bandwidth,
so just check that the bandwidth is also within spec.
 
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    samuel

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Re: about phase margin

I think eladla and rampat are right
 

Re: about phase margin

a phase margin of 72 deg @ unity gain is large ? thanks anyway.

another problem is a PSRR of 33 db , is too small? when I apply my designed OPA with PSRR of 33db to a practical circuit, the output voltage is flutating.
 

Re: about phase margin

From the low PSRR I'm guessing you are designing a Miller compensated two stage opamp?
If not, tell me what topology you are using, since dealing with PSRR depends on the topology.
 

Re: about phase margin

eladla said:
From the low PSRR I'm guessing you are designing a Miller compensated two stage opamp?
If not, tell me what topology you are using, since dealing with PSRR depends on the topology.
Click to expand...

I had designed a rail to rail amplifier.
the details are as followed links.
https://www.edaboard.com/threads/186771/
 

Re: about phase margin

I was talking about the inside of the amplifier. Can you post a transistor schematic?
PSRR problems can come from many places. Two stage miller compensated opamps have PSRR problems due to the coupling of the compensation capacitor,
for example.
If I see your schematic, maybe I can see where the PSRR prob is coming from...

By the way, are talking about simulation or real, on silicon measurment?
 

Re: about phase margin

hi i think abouat phase margin that we must have +180 or -180 deg (and near these degre's).
 

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