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SystemC is a C++ library that is used for modeling e.g. at cycle-accurate or transaction level of digital systems.
It is most often used for system-level design. I have used SystemC-2.0.1 which can be obtained e.g. from www.systemc.org or many other places and it is free of course. And of course with your favorable host compiler (g++).
The problem is that the "language" has not been stabilized yet. Anyway this particular version should be compatible enough with any feature version or extension.
Basically, it is difficult to synthesize from SystemC (the existing tools are not as mature as the HDL ones). But you can use for system verification.
It is said systemC will find widely applications in few years, because it can be
used to model the whole system, and because its strong support to hw/sw
co-verification. Seems, it has been used already in EU and JP.
HDL's (Verilog and VHDL) are mainly used for RTL design now.
By the way, PLEASE DON'T PUT the training AD's here to waste our time, that
is really not agreeable.