Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

What is retention algorithm for memories?

Status
Not open for further replies.

shakti_pattnaik

Newbie level 5
Joined
Apr 28, 2006
Messages
8
Helped
1
Reputation
2
Reaction score
0
Trophy points
1,281
Location
Bangalore
Activity points
1,349
I wanted to know about the retention algorithm used for memories. Can anyone give an idea on this as to how the memory is exercised and how the retention algorithm actually sees whether the memory retains a value?
 

santhosh007

Full Member level 2
Joined
Aug 27, 2008
Messages
126
Helped
30
Reputation
60
Reaction score
4
Trophy points
1,298
Location
Bangalore
Activity points
1,911
retention test algorithm is similar to checkerboard except the waiting period. it verifis the that if the memory can retain the initial content for a period of time say 10-50ms depends on the process.
after a write, there is wait for retention and read back acn compare the content.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top