[SOLVED] what is ptap and ntap in layout

[preethi19]

Hi can anyone explain to me what is "ptap" and "ntap" in layout design. Is it nothing but the layer we draw to give the body connection of the transistor or is it something else?

 

[saurabhr8here]

You're right. It is the layer drawn to provide body connections of the transistor.

 

[dick_freebird]

The "tap" consists of same-species highly doped implant
(P+ for Psub / Pwell, N+ for Nwell) but is more than one
layer. You need the contact cut and metal1 for electrical
access, you need active for the implant hard-mask-not.
You will often find PCells existing for ntap and ptap. You
may find layertable entries that are used for recognition
but a single layer won't make a tap connection by itself.

Taps need to be close enough and solid enough (ohmically)
to prevent any of the myriad parasitic lateral BJTs to wake
up from noise, impact ionization, etc. There will always be
a max distance to active area rule, often specific to core
or I/O application, and this is the worst you're allowed to
get away with, not the best you can do.