what is meant by boundry scan ??

[ninja]

while downloading a bit file into FPGA's, i came across this( i am using xilinx ISE tool).i selected BOUNDRY SCAN mode and downloaded the bit file, my logic worked perfectly, but i dunno what is meant by this ? can any clarify me ??

 

[eda_wiz]

**broken link removed**
JTAG boundary scan started as a method of testing ICs and their interconnections using a shift register built into the chip so that inputs could be shifted in and the resulting outputs could be shifted out using only four I/O pins (clock, input data, output data, and state machine mode control). This eliminated the need for complex, expensive, bed-of-nails cards for low-speed probing of IC I/O pins.

Eventually, the uses of JTAG expanded to include things like debugging software for embedded microcontrollers, thus reducing the need for in-circuit emulators. And JTAG is a natural match for downloading configuration bitstreams to FPGAs.


fo more check
https://focus.ti.com/lit/an/ssya002c/ssya002c.pdf

 

[soccer]

**JTAG boundary scan started as a method of testing ICs and their interconnections using a shift register built into the chip so that inputs could be shifted in and the resulting outputs could be shifted out using only four I/O pins (clock, input data, output data, and state machine mode control). This eliminated the need for complex, expensive, bed-of-nails cards for low-speed probing of IC I/O pins.**
why?

 

[manu_leo]

Boundary scan is a testing method to test the IC's at board level.Since the pitch sizes og package pins have redused to .3mm etc ,in surface mount technology, it is difficult for mechanical probing during board level testing so JTAG found new way of testing the IC's using Boundary scan.

 

[nav_vlsi]

.....

 

[anilkumarv]

Hi,
for boundary scan you can refer the following document