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what is mean by internal power in .lib

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raju3295

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hi,
Power consumption in a chip can be broadly divided in to two categories
1> Static power----this is due to leakage in the mos structure in off state
2> Dynamic power -- this is the power consumed when chip is in on/functional state ---- this can be divided in to two categories i) switching power --- charging and discharging of cap ii) shortcirtcuit power-- this is due to short betweeen vdd and vss with R of two mos structres

Now my doubt is the internal power specified in teh .lib corresponds to short circuit power /static power
i know the switching power can be derived from the actitity. but doubt about the other two
if internal power corresponds to shortcircuit power then how tool caliculates the static power
 

Internal power is power dissipated within the boundary of a cell. During switching, a circuit dissipates internal power by the charging or discharging of any existing capacitances internal to the cell. Internal power includes power dissipated by a momentary short circuit between the P and N transistors of a gate, called short-circuit power.

The switching power of a driving cell is the power dissipated by the charging and discharging of the load capacitance at the output of the cell. The total load capacitance at the output of a driving cell is the sum of the net and gate capacitances on the driving output.
 
there is a leakage power attribute for static power consumption,
the internal power cosists of short ckt power and switching power of internal caps,it is expressed in watts/freq
 

hi sudheer

Can u elaborate about the the internal caps
and can u tell me wht is the attribute for the leakage pwoer in the .lib
 

there will be cell_leakage attribute which takes care of static power diss,its units are specified in .lib,
internal caps are the parasitic caps like overlap caps
 

yep able to got it,
there are two power tables in the .lib, leakage_power and internal power table,, so tool will pick up from these tabels,,
 

Hi,

The attribute leakege_power in the .LIB file corresponds to the static leakage power in the cell. This is the leakage current that flows from VDD to GND when the cell is not switching. Characterization tools do a DC simulation to get this leakage current.

The attribute dynamic_power in the .LIB corresponds to the power consumed by the cell due to switching activity. characterization tools do a transient simulations for various input pin combinations to get this dynamic power values. For every output pin for every input pin combination you will have a dynamic power block in ut .LIB.

regards
Chethan
 
hi,
fr simulating a ckt (defined at gate level in verilog) in simVision i ned to convert my .lib file to .v format.

How can this be done:?:
 

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