Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronic Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

what is Cycle Stealing in Latch based circuit?

Status
Not open for further replies.

VLSImaniac

Newbie level 3
Joined
Aug 1, 2007
Messages
3
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Activity points
1,297
latch based design

Hi all,
Can any one tell me what cycle stealing is?
 

ubna

Advanced Member level 4
Joined
Jul 25, 2007
Messages
112
Helped
14
Reputation
28
Reaction score
5
Trophy points
1,298
Location
India
Activity points
1,819
latch cycle stealing

In a big design including flops, if there is too much delay due to combinational circuits between two particular flops, the clock time period should be as high as that.. but the trade off cannot be afforded just for a single combinational ckt. in a big design.. So the solution is by using a latch.. when a latch is used instead of the flop after the long delay, the clock period can be considerably reduced and the latch gets its data some time after the positive edge of the clock.. This is a great boon for developing microprocessors with low clock frequencies..

Note: The delay of the combinational circuit must be less, so that the data from the latch reaches the next flop before the clock..

Please press the helped button if you think this is useful.
 

    VLSImaniac

    points: 2
    Helpful Answer Positive Rating

omkar

Newbie level 4
Joined
Sep 13, 2004
Messages
7
Helped
2
Reputation
4
Reaction score
0
Trophy points
1,281
Activity points
53
latch how much cycle

cycle stealing occurs when combinational logic is moved from one clock phase to another in order to equalise latch-to-latch signal delays throughout a latch based design having multiple latch-to-latch stages.Synthesis tools may have the ability to automatically perform cycle stealing during optimization.
 

    VLSImaniac

    points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.
Toggle Sidebar

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top