what is clock streching and why it is done ?

[shastri.vs]

clock streching

what is clock streching and why it is done ??

 

[FvM]

fpga clock streching

Consult the I2C specification

 

[shastri.vs]

Re: clock streching

I am asking in general , not with respect to I2C.
Anyway I will go through the doc .

 

[FvM]

clock streching

I don't think, that the term has a general meaning outside I2C technology. Or do you know any?

 

[shastri.vs]

Re: clock streching

I am designing a ROM wrapper module. One of the output Ready, goes to the main controller(ARM), is used to stretch the the clock of the ARM.
Clock stretching means stretching high or low duration of the clock or mechanism to make the cpu wait until Ready signal.
In the second case it is like the CPU doesnt select (CS signal)ROM until ready is asserted.
which is correct ??

 

[FvM]

clock streching

Considering your last post, I don't understand your initial question. You have defined a special meaning of clock stretching related to your application, independant of existing or non-existing general use of the term. That's O.K., but what your actually asking for?

Regarding ARM technlogy, I noted, that some original ARM datsheets mention the possibility of stretching the input CLK in high or low state, which is just another word for a completely statical clock. I didn't see this kind of clock manipulation mentioned related to memory interface operation and I doubt, if it's of any use in typical ARM applications. It seems to me that HREADY usage is suggested to stretch memory cycles rather than stretching a clock.

As a basic problem, many ARM variants don't provide a READY control of external memory interface. But I don't think that clock manipulation is an appropriate replacement.