What is a bank in FPGA?

[richardyue]

What is bank in FPGA? I've seen it many times in the basic structure of FPGA. But what is? Why do we need banks in FPGA and what is the functionality of this part? Thanks in advance.

 

[echo47]

Bank in FPGA?

In Xilinx FPGAs, a bank is a group of I/O pins that share a common resource such as one power supply or one output current reference. It makes the FPGA easier to manufacture (less expensive), and it may reduce the number of device pins, but it also restricts your choice of programmable I/O types depending on which pins you choose.

 

[richardyue]

Bank in FPGA?

I understand it. But in FPGA, are there more than one power supply? Would you like to explain it in detail? Now I understand why we use banks in FPGA according to your answer, but I don't understand how the bank works in the FPGA. Thanks in advance.

 

[echo47]

Bank in FPGA?

Different FPGAs have different bank architectures. Some FPGAs don't have any banks. Some FPGAs have multiple power supplies, others have only one. Banks and power supplies are not necessary related to each other. You must carefully read the data sheet for your specific FPGA.

 

[richardyue]

Bank in FPGA?

Hi, echo47,
Thanks for your help. I will post silly question again. In my opinion, we connect a device to only a voltage source. For example, a specific device may have input and output ports, clock, voltage, ground, etc. Why are there so many power source?

 

[samcheetah]

Bank in FPGA?

well this actually pertains to the layout of the IC, be it an FPGA, ASIC or Microprocessor. one thing to keep in mind is that the "power source" is the same. at micro and nano levels its always better to have more VCC and GND pads.

 

[richardyue]

Bank in FPGA?

Hi, samcheetah,
Thanks for your help. But I still can't understand it. Would you like to explain it in more detail. Thanks for your time for my bird-brained.

 

[samcheetah]

Bank in FPGA?

there are many situations due to which IC designers have to provide more than one VCC pin. sometimes ICs require both 3.3V and 2.5V power supplies. the 2.5 V might be for the Core and 3.3V for the I/O.

furthermore, if the IC has both analog and digital portions, their grounds will be separate.

now why is it that for a 3.3V there are many pins. why not a single pin for the 3.3V and a single pin for the 2.5V??? well, the reason is that you cant just take 3.3V from a single pad and run it through the whole IC. the resistance between that pad and the last section of the circuit will be great. so the solution is to provide a low resistance path for VCC which is done by having more than one VCC pins.

i hope that helps

 

[alt007]

Re: Bank in FPGA?

hi ,
Depending upon technology,FPGA needs the power source .
VCCIO - I/O Bank Voltage (specific voltage level supported )
VCCINT- Core Voltage (fixed )
Regards
alt007

 

[richardyue]

Bank in FPGA?

Hi, samcheetah,
Thanks for your valuable information. I really appreciate your help. I still have many questions about FPGA. Hope you can continue to help me out. It's very nice that there are so many kind people who are somewhere waiting for helping with my problems.

 

[samcheetah]

Bank in FPGA?

Welcome to EDAboard !!!!!!!!!!!!!!!!!!!

 

[sp]

Bank in FPGA?

one of the example why there are many VCC is tht for external world, the fpga need to be compatible wth the 3.3V TTL (for instance)... so the IO block would need to use 3.3V...

but to reduce the power lost (during switching).. the core VCC would be prefered to use lower voltage... as we know the switching power lost is proportional to the VCC²

regards
sp