vlsi_maniac
Junior Member level 3
verilog event
below is example where i seen iff statement.
always@(posedge clock iff (reset=1),negedge reset)
if(!reset)
q<=0;
else
q<=d;
what is the use of iff and when should we use it.
below is example where i seen iff statement.
always@(posedge clock iff (reset=1),negedge reset)
if(!reset)
q<=0;
else
q<=d;
what is the use of iff and when should we use it.