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What does breakdown region means in CMOS?

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wing0

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Hi,

When i increase the VDD to 5V for my bandgap reference circuit, 1 of the transistor in the start-up circuit is in breakdown region, but the simulation output is correct, so does the result still valid?

In the log file it state that the Vgd has exceeded the oxide breakdown voltage, so what does it means?

Thank you.
 

wing0 said:
... In the log file it state that the Vgd has exceeded the oxide breakdown voltage, so what does it means?
It means exactly what it says. And if Vgd actually exceeds the oxide breakdown voltage, the gate-bulk oxide definitely will break down and then is irreparably damaged (would mean: your start-up circuit works only once :-( ).

Usually, the 5V-exceeding is a warning only, because the actual breakdown voltage is
≈ 7V. See your PDK or contact your foundry about the valid worst case value.

Anyway you should care by design that Vgd ≥ 5V cannot be reached / exceeded.
 

    wing0

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