What does a Verification IP mean?

[raviram80]

Hi All,

Can someone please explain what does a Verification IP mean? If someone can point to some documentation for the same?

Thanks,

Ravi

 

[ljxpjpjljx]

Re: Verification IP

that is a reuse IP for verification owner to use!

 

[Nantha]

Re: Verification IP

Hi,
# Synopsys’ DesignWare® Verification IP helps design engineers speed testbench development time by offering a broad portfolio of the industry's most popular bus protocols such as PCI Express®, USB, SATA, Ethernet, AMBA® On-Chip Bus, OCP and more.
# The Verification IP integrates easily into SystemVerilog, Verilog, VHDL and OpenVera testbenches and supports advanced verification methodologies such as VMM for SystemVerilog.
# In addition, the Verification IP delivers up to 5X simulation performance improvement when used with Synopsys’ VCS simulation tool. The DesignWare Verification IP is available in the DesignWare Library, VCS Verification Library or as single licenses.