what do you mean by very high speed in VHDL????

[abhi_459]

what do u mean by vhdl

what do you mean by Very High Speed in VHDL...what does basically it means.....is it realeted to propagation delay?????? kindly suggest me......

 

[MagixD]

Hi,

"very high speed" in VHDL is more of a advertising term. VHDL is just the language ans has nothing to do with real timing parameters of your target. So it VHDL is not fast than Verilog, SystemC or others, if you have thought about this.
Proporgation delay is a parameter of the target (FPGa, CPL, ASIC,...) itself. the maximum speed of a design is determined in the place-and-route process of your design tool.

Best regards,
magixD