joe2moon
Full Member level 5
Verilog2001 has added a lot of features/properties to make it can do things that VHDL can do, such as "signed" operation and multi-dimensional array.
Although the EDA venders, just like $ynopsys, C@dence, Ment0r, ... etc. all calim they will support Verilog2001 standard.
But in order to be portable to older veriosn Verilog simulator or logic synthesizer, I still use the subset of Verilog1995 to do my design.
I am wondering if you can really gain something from Verilog2001 ? 8O
Although the EDA venders, just like $ynopsys, C@dence, Ment0r, ... etc. all calim they will support Verilog2001 standard.
But in order to be portable to older veriosn Verilog simulator or logic synthesizer, I still use the subset of Verilog1995 to do my design.
I am wondering if you can really gain something from Verilog2001 ? 8O