What determines the number of rows in an SDRAM?

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matrixofdynamism

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SDRAM is divided into banks, each bank into rows and each row into columns. What determines how many rows will be there in an SDRAM?
Is there a formula used to go from a single memory location address to generate three addresses of bank, row and column?
 

So it is an arbitrary choice of the SDRAM designers? I see.
 

But if you can access memory locations using linear addressing, then internal organisation may not matter for your application.
 

mjuneja said:
But if you can access memory locations using linear addressing, then internal organisation may not matter for your application.
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It can be very important. DRAM can be very slow when switching from row to row. But reading across banks and within a row incurs little/no turnaround penalty. So if you can, it is best to design your logic with this knowledge.
 

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