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What are the precautions for constraining latches in RTL coding?

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vsrpkumar

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I am new to Design compiler.My entire core works on a system clock .but for external communication I am using I2C bus(asyncronous logic) with help of latches for communication between system clock and I2C bus.How to constrain latches.Generally what precaution should be takes for latches while RTL coding and for constraining(design compiler).Kindly help me regarding this
 

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