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What are the methods for designing FIFO?

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alpeshchokshi

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hello friends,
i need the help to design the fifo.
what are the different way that we can design the fifo
also give me architectural overview of fifo
i am asking abt the synchronous fifo
Also How i have to decide the depth of the fifo?

thanks in advance
 

Re: designing of FIFO

im looking forward to know answer for this as well dear... plz some body help us out as soon as possible..
thank you very much in advance....
 

Re: designing of FIFO

Please find some papers associated with this topic on sunburst website!

You can find a lot of related materials there!


Good Luck!


Thomson
 

designing of FIFO

Could you detail your target? Sync FIFO, Async FIFO, One clock, Muti-clock, ....

There are some papers that maybe are useful.

SUNG, San Jose, 2003 <Synthesis Optimized Universal Synchronous/Asynchronous Generic FIFO Design>

**broken link removed**
 

Re: designing of FIFO

Hi,

The first thing you need to consider is the depth of the fifo.This is determined by the read and the write speed(Its the ratio).
Since this is a synchronous fifo, so managing read and write pointers for accesing the fifo is not a tough job. Remember, write pointer will point to the next location being written and read pointer points to the location being read.
Now there will be some signal controlling the read and write access to the fifo.
Whenever the write signal is asserted, write the incomming data to location pointed by write pointer and then increment the pointer.Whenever the read signal is asserted, read the data pointed by read pointer and increment the pointer.
To generate the control signals life fifo full/empty/overrun/underrun compare the read and write pointers.To prevent more than one bit change, use gray encoding for the pointers.
Hope i was clear above.
Regards.
dak-ju
 

Re: designing of FIFO

hi dak-ju,

can u give mathematica relation for the depth of fifo accrding to read and write speed

Regards,

Preet
 

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