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I once had a system with a mix of 100 and 400 Khz devices.
Of course, I operated everything at low speed.
One lazy afternoon, I decided to play a little bit, and using exactly the same proven code, increased the speed to 400 khz.
The 100 Khz devices would never respond, that was expected.
What was a surprise was the fact that even when addressing the high speed devices, they would sometimes hang the bus.
I assume the low speed devices, which may not properly track the bus activity may think they 'hear' their address being called randomly when it isn't. That's the worst case scenario which will hang the whole bus.
It's well-known that an I2C slave can lock the bus if it has been put into slave transmitter mode by bus glitches or otherwise misunderstood bus signals. According to the Philips/NXP I2C-manual, a reset procedure is required in this case.
Bus recovery sequence is done as following:
1-Send 9 clock pulses on SCL line
2-Ask the master to keep SDA High until the “Slave-Transmitter” releases the SDA line to perform the ACK operation
3-Keeping SDA High during the ACK means that the “Master-Receiver” does not acknowledge the previous byte receive
4-The “Slave-Transmitter” then goes in an idle state
5-The master then sends a STOP command initializing completely the bus
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