What are the constraints and objective while designing digital memory blocks?

[semiconductor_roks]

3. What are the constraints and objective while designing digital memory blocks?

 

[semiconductor_roks]

Re: Memory Design

Can someone answer my question?

It was asked me in one interview and I went point blank since I was not able to gather the points..

Thanks in advance.

 

[dinesh hegde]

Memory Design

I have few points,
1. Leakage : Since memory is a charge storing element.
2. Speed : How fast read/write operations are done. How many clock cycles does it requires to complete one read/write operation.
3. During layout how much area does it take (depending on size of memory)

People can add more.

 

[Nobody]

Memory Design

The static memory are composed of bit cell-block , address decoder block and sense amplifier block and read/write io block . The constraint on the memory are timing / power/ area . So as a designer your job is to achieve the goal under those constraints with different architecture and circuits .

 

[semiconductor_roks]

Re: Memory Design

Thanks Dinesh and Nobody.
The answers are really helpful.

Dinesh.....

I had replied the same as what you said for layout since I am layout design engineer, but was not so sure of it.
I thought he was looking for some more points.

Thanks once agin to both of you.