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IP Cores are Intellectual Property Cores. They are blocks or modules that have been designed and tested for a specific function such as processors, ethernet interfaces and RAM controllers.
Soft IP cores are in the form of HDL and typically have some kind of license associated with them (GPL or proprietary). Hard cores are synthesized blocks that can be instatiated, placed in your design.
The Xilinx specific cores from Xilinx cost money:
**broken link removed**
Hard IP cores are already fabricated in the fpga. these will not account for any fpga programmable resources. These IPs, even if used or not used, will be a part of FPGA unlike soft IPs. Soft IPs can be synthesized and these will be programmed in the fpga.
xilinx will usually generate an edif file .edn, .edf
you also get a wrapper file .vho, vhd that allows you to use the core in your design.
when adding the wrapper file to xilinx ise project, it will put a question mark around it, you can leave it like this or add an .xcf file to it.