WGL/STIL to Verilog testbench

[tys]

how to convert WGL/STIL into Verilog testbench?

I used to generate verilog testbench and run simulation with them, and convert the vcd into atp.
however, Tetramax no longer supports generating verilog testbench in new versions, how to run the simulation with STIL or WGL patterns now? with which simulator?
or how to convert WGL/STIL patterns into verilog testbench (then to run simulation)?
thanks.

 

[Noobengineer_DFT]

Re: how to convert WGL/STIL into Verilog testbench?

Did u get any tool or script to convert STIL pattern file into verilog testbench??????

 

[azura]

Re: how to convert WGL/STIL into Verilog testbench?

Dear sir/madam,

Has this problem been solved?
If it has already been solved, can anybody share with me the solution. I am also need to convert WGL file format to Verilog testbench.

Please help.