I'm confused with NMOS and PMOS transistors in subthreshold region.
Which of them has the higher current value, for a given value of Vgs?
Which of them has the higher subthreshold slope?
Which of them has the higher value of threshold voltage?
In weak inversion the current varies exponentially with gate-to-source bias VGS as given approximately by .
where ID0 = drain current at VGS = Vth, the thermal voltage VT = kT / q and the slope factor n is given by n = 1 + CD / Cox, with CD = capacitance of the depletion layer and COX = capacitance of the oxide layer. With the same physical (W and L) and process parameters (dopping levels) NMOS will have higher drain and sub-threshold leakage current as the mobility of electrons is higher than holes.
Slope in sub-threshold region will be same as both CD and Cox are same in both cases.
Threshold voltage mainly depends on: Gate insulator thickness, Substrate dopping levels, Gate material, temperature.. So threshold voltage will also be same for NMOS and PMOS for same physical and process parameters.