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walsh code matrix generation using vhdl

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Prathibha R

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Hello,
I'm trying to write code for 64*64 walsh code matrix using hadamard recursive algorithm.The code is below.I'm getting some syntax error in 2d matrix declaration.Please help me.The error what i am getting is Type integer is not an array type and cannot be indexed.



Code VHDL - [expand]
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use ieee.numeric_std.all;
USE ieee.std_logic_arith.all;
package test is
subtype word is integer;
type strng1 is array (0 to 63) of word;
type strng2 is array (0 to 63) of strng1;
end test;
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
USE ieee.std_logic_arith.all;
use work.test.all;
 
 
entity walsh is
port(N,M:inout strng2);
end walsh;
 
architecture Behavioral of walsh is
 
begin
process
constant A:integer:=64;
variable z:integer:=1;
variable m,n,x:integer;
begin
 
x:=(2**z);
for i in 0 to x-1 loop
for j in 0 to x-1 loop
if((i=j) and (j=1)) then
M(i)(j)<=1;
else
M(i)(j)<=0;
end if;
end loop;
end loop;
z:=z+1;
x:=(2**z);
 
 
while(x<=A) loop
for i in 0 to x-1 loop
for j in 0 to x-1 loop
m:=i mod (2**(z-1));
n:=j mod (2**(z-1));
if((i>=(2**(z-1))) and (j>=(2**(z-1)))) then
N(i)(j)<=not M(m)(n);
else
N(i)(j)<= M(m)(n);
end if ;
end loop;
end loop;
for i in 0 to x-1 loop
for j in 0 to x-1 loop
M(i)(j)<= N(i)(j);
end loop;
end loop;
z:=z+1;
x:=(2**z);
end loop;
end process;
 
end Behavioral;

 
Last edited by a moderator:

PHP:
port(N,M:inout strng2);
.....
variable m,n,x:integer;

VHDL is not case sensitive, you can't have m,n and M,N

also there is no not operand for integer
Code:
N(i)(j)<= not M(m)(n);

also do not use together
Code:
use ieee.numeric_std.all;
USE ieee.std_logic_arith.all;

use only numeric_std.

and overall this code looks like C sw code not hw
 
Last edited:
Revised walsh code matrix generation

Hello,
I have writtten the vhdl code for generation of 64*64 walsh code matrix.While synthesizing I am getting an error in 2nd for loop.The error is Range bound must be a constant.Here is my program.Please help me to debug the code.Thank you.


Code VHDL - [expand]
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library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use ieee.numeric_std.all;
USE ieee.std_logic_arith.all;
package test is
constant A:integer:=64;
subtype word is bit;
type strng1 is array (0 to (A-1)) of word;
type strng2 is array (0 to (A-1)) of strng1;
end test;
 
 
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
--USE ieee.std_logic_arith.all;
use work.test.all;
 
 
entity walsh is
port( N,M:  inout strng2 );
end walsh;
 
architecture Behavioral of walsh is
 
begin
process
 
--variable N,M: strng2;
variable z:integer:=1;
variable c,d,x:integer;
begin
 
x:=(2**z);
for i in 0 to 1 loop
for j in 0 to 1 loop
if((i=1) and (j=1)) then
M(i)(j)<='1';
else
M(i)(j)<='0';
end if;
end loop;
end loop;
z:=z+1;
x:=(2**z);
 
 
while(x<=A) loop
for i in 0 to x-1 loop
for j in 0 to x-1 loop
c:=i mod (2**(z-1));
d:=j mod (2**(z-1));
if((i>=(2**(z-1))) and (j>=(2**(z-1)))) then
N(i)(j)<=not M(c)(d);
else
N(i)(j)<= M(c)(d);
end if ;
end loop;
end loop;
 
for i in 0 to x-1 loop
for j in 0 to x-1 loop
M(i)(j)<= N(i)(j);
end loop;
end loop;
z:=z+1;
x:=(2**z);
end loop;
end process;
 
end Behavioral;

 
Last edited by a moderator:

The error is correct. VHDL is not software. For loops are unrolled into parrallel hardware, so for synthesis loops must use constant values.
 
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