Jan 4, 2018 #1 A analogTechie Junior Member level 1 Joined Nov 2, 2004 Messages 15 Helped 3 Reputation 6 Reaction score 0 Trophy points 1,281 Location USA Activity points 170 Hi all .. & a Happy 2018 New Year ! Does anyone know about the "VTA adder" methodology for Cadence Spectre simulations ? It is used to simulate the effect of process variations in CMOS analog circuits ? Could anyone describe it or share any references on this topic ? Thanks !
Hi all .. & a Happy 2018 New Year ! Does anyone know about the "VTA adder" methodology for Cadence Spectre simulations ? It is used to simulate the effect of process variations in CMOS analog circuits ? Could anyone describe it or share any references on this topic ? Thanks !