Voltage level in cell and power gating switches in multi-Vdd design

[kimthi]

Hi all,
Please help me!
I want to know about multi-Vdd library.
How many voltage level are there in each standard cell? [Not include: special standard cell ]
Power gating switches are used in multi-Vdd design=> what for?

Thanks,

 

[cafukarfoo]

Re: Multi-Vdd design

You can have any number of different vdd supply in your design.

For multiple vdd design, you have level shifter to connect between 2 different power domain. So in the level shifter cell, you will have 2 different power port connect to different power level.

I believe power gate switch is used to turn off certain core area that operate on certain power domain when that power domain is not in use to save power consumption. I believe the concept is something like clock gate to turn off certain clock tree that is not in used.

Hope this help. Thanks.

 

[kimthi]

Multi-Vdd design

Thank you,
Ya, the level shifter has 2 different power port connect to different power level.
The isolation cell is place between floating points.

I means:
The standard cell that is the most in multi-vdd design. How many power supply in them?
Do all the standard cells have two or more power supply?

--Regards,

 

[cafukarfoo]

Re: Multi-Vdd design

Maybe i don't understand your question clearly.

Normal standard cell should just have 1 power supply. This standard cell had been characterized using 1 power supply.

Let say your design have 3 power domain ( A, B and C )

type 1 standard cell will be placed in power domain A. This standard cell will have 1 power port connected to the power net A. And the same with B and C.

So for summary, although you are in multivdd design, your normal standard cell(flop, buffer, mux, adder ) should just have 1 power supply.

 

[avimit]

Re: Multi-Vdd design

There can be mixed Vt(threshold) Cells in your design. Are you sure you are talking about multi vdd and not multi Vt cells?
Kr,
Avi
http://www.vlsiip.com

 

[Thinkie]

Multi-Vdd design

Cells always have one power source. Multi VDD has many power islands but all cells in the island have one power source

MultiVT however, you can mix High and Low leakage cells... they still have one power source

 

[kimthi]

Multi-Vdd design

What's AON cell? Is it always_on cell?
Do we use it in multi-Vdd design?
The function of AON cell, retention flop, power gating switches and enable level shiter?
Do you know about them? Plz tell me ...

 

[forkschgrad]

Re: Multi-Vdd design

hi kimthi,

What's AON cell? Is it always_on cell?
Do we use it in multi-Vdd design?
The function of AON cell, retention flop, power gating switches and enable level shiter?
Do you know about them? Plz tell me ...

see **broken link removed**

i hope this helps

fork