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Voltage drop advantage question

yefj

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Hello,one advantage of using in differential pair mosfet load instead of ressistive load because in DC we get a small voltage drop and i AC we get a large rout
but as you can see in the formula bellow,rds and rout is the same.
so where os the advantage?
Thanks

5.jpg
 

BradtheRad

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Your schematic labels equal DC voltage in the input signals, therefore DC portion is common-mode and is cancelled (rejected) by the differential detector. So only the AC is amplified.
 

yefj

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I am asking regarding the voltage drop in DC of the top load transistors.
Why in DC we have lower ressistance then ac?
Thanks.
 

LvW

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I am asking regarding the voltage drop in DC of the top load transistors.
Why in DC we have lower ressistance then ac?
Thanks.
The dynamic (differential) output resistance ro of a transistor is the inverse slope of the (relatively flat) output curves ID=f(VDS). Hence, this value is relatively large.
In contrast, the DC resistance (determined by the corresponding DC operational point) is the inverse slope of the pointer between the origin and the operational point.
It is obvious that this slope is much larger - hence the corresponding DC resistance Rce is much lower .<ro)<ro).< html=""></ro)<ro).<>
 
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