VIRTEX 7 BLVDS Application

[skquah]

Hi , Im designing a Board using virtex 7 fpga.
I need to have a multi-drop application using LVDS signal (one LVDS drive to many LVDS receiver). I have read that virtex 7 have BLVDS(bus lvds). I have read it user guide and notice that the driver end required termination of (2x 165ohm series resistors and a 100 ohm parallel resistor).
the receiver end required a 100ohm parallel resistor for termination.

Attached is my design.

my qns is:

1) Can virtex 7 BLVDS support my design (multidrop application)
2) does all the receivers required the 100ohm parallel resistor or only one of them required it?

Hope friend that have designed multidrop application using virtex series fpga can share their experience. Thank you

 

[amit.kumar11]

Hi,

You need to have 100 ohms for all receivers.

 

[KlausST]

Hi,

in a bus you need to terminate each END of the bus, not every receiver.

Referring to your picture: Card2 and Card3 don´t need the termination.
Avoid star connection. Use wiring and connectors for unique characteristic impedance.
The distance from the bus to the receivers should be short.

Klaus