Virtex-6 ML605 design test using test vectors from MATLAB/file

[aliasnikhil]

Hi All,

I need to test a design on ML605 evaluation board (Virtex-6).

The problem I am facing is how do I give input test vectors to the FPGA in real time using my testbench or chipscope or any other way. The design does not have any I/O pins yet because I am yet to debug it. Instead, the input test vectors are stored in a file and not coming from an external source. I need to find a way to send these as inputs to my design.

I know that chipscope can help me monitor the outputs but how do I apply test vectors that are stored on a file? I want my design to work in excess of 100MHz. Even if I use the hardware co-simulation using system generator in MATLAB, the JTAG or even the Ethernet isn't fast enough to send so much data so fast.

I have verified my design using the Simulink plugin "System Generator" in the Hardware Co-simulation environment. But the trouble with that is it works at very slow speeds. I want to test it for high speeds (that being the primary goal/spec) Can I somehow store my test vectors in a memory beforehand and make the circuit accept that as input? Or is there any other way?

Please help!

Thanks
-Nik

 

[TrickyDicky]

You will have to look into some protocol like Ethernet, USB or PCIE. There should be cores available for these but they are not trivial to integrate. THere may also be an additional cost to use these IPs in your design.