Virtex 2 Pro ISE and EDK integration problem

[sandeepc]

I am experiencing an error when I try to integrate an EDK and ISE
project together using 10.1 SP 3. I am using a virtex 2 pro
development board and the MPMC 4.03 memory controller for external DDR
SRAM from Kingston. My project works correctly within EDK but when I
instantiate it within ISE and copy the UCF file I get an error.

I have the following errors:
ERROR:ConstraintSystem:58 - Constraint <Net DDR_SDRAM/*rd_data_fall_in* MAXDELAY
ERROR:ConstraintSystem:58 - Constraint <Net DDR_SDRAM/*rd_data_rise_in* MAXDELAY

where the net names are not found. This works perfectly in the EDK.
How do I go about solving this? Also to integrate an ISE and EDK project, should the full EDK project be placed in the ISE folder? Are the MHS and MSS files needed by the ISE? My UCF file is attached

Thanks,