shhaha
Newbie level 6
Morning, everyone:
I have met a problem in inductor using o.18um cmos simulated by Momentum:
the substrate setting is depicted as follows:
M6(metal)------------- M6
Imd5(substrate)---------- via 5
M5(metal)------------- M5
imd4(substrate)----------via 4
M4(metal)------------- M4
if the inductor is implemented in M5,via 5, M6, the simulation results are similiar to the real. But if i place the inductor in M4,via4,M5, the simulation results are wrong. After careful check, the problem is the via 4 can't connect M5 to M4, which cause the these two metal layer are open. I have checked the via setting, the setting is same as that of M5-via5-M6. Could you tell why does the problem exist? how to solve it?
I have met a problem in inductor using o.18um cmos simulated by Momentum:
the substrate setting is depicted as follows:
M6(metal)------------- M6
Imd5(substrate)---------- via 5
M5(metal)------------- M5
imd4(substrate)----------via 4
M4(metal)------------- M4
if the inductor is implemented in M5,via 5, M6, the simulation results are similiar to the real. But if i place the inductor in M4,via4,M5, the simulation results are wrong. After careful check, the problem is the via 4 can't connect M5 to M4, which cause the these two metal layer are open. I have checked the via setting, the setting is same as that of M5-via5-M6. Could you tell why does the problem exist? how to solve it?