Via-In-Pad or Via-Next-To-Pad - which is best?

[reshaping]

Which has the minuimum inductance for a decoupling cap:

1. Blind via-in-pad with via diameter of 0.15mm finished,
extending from layers 1 to 5 in a 6-layer board, OR

2. Tracking to an immediately-adjacent 0.7mm pad, 0.3mm
finished blind via,extending from layers 1 to 5 in a 6-layer
board?

 

[zgx]

the inductance is related to the track width and length, vias diameter and depth. the good method is using EDA software to design.

 

[loki]

suggestion

You'll generally get better results using the microvia in pad method. Blind vias seem like an expensive option. Don't really know what manufacturers can handle blind microvias.

You may be better off adding a couple of additional ground planes for the additional cost of the microvias and blind vias.

General notes to try to ween you away from blind vias.
Is you're design above 500 MHz, whats are the fastest signal rise times your design is looking at? Are you having problems in the 50 -200 MHz range for EMI?
Use the smallest package size cap (low ESL) since the most inductance is going to be from the cap teminals.
Good multiple solid signal return planes with thin laminate between them and the signal planes will help contain the high frequency return signals!
Try to determine the return paths of your signals and avoid plane jumping of critical high speed signals.

 

[Beepster]

Anything bigger than a microvia will suck all the solder off the pad and down the hole.

Filled vias (where the vias are plated solid -no hole is left) are very expensive. Don't do it !

 

[ronbmy]

Have a look at the following.....

**broken link removed**

**broken link removed**

and do a google search for 'blind via' & 'via in pad'.

 

[homan]

good info. web page.

 

[brmadhukar]

Hi,
The frequency is important. Assuming a hi frequency, the placement of bypass capacitors becomes important. For analog ICs the bypass capacitors need not as close to the pin as for digital IC or pins. dI/dt matters. For HF the pin capacitance also matters.

 

[prouddad_1]

Important consideration when using via in pad.

An important thing to consider when putting a via in pad:

If this is a first time design with no bugs discovered, there is very little you can do to fix or modify the board if the via is located in the pad. If you can afford the space I would recommend putting the via offpad incase rework is needed to debug the board. Once the design is stable via on pad is fine provided the via is small due to the reason mention earlier.
Large via will suck solder into the via compromising pin contact to pad.

 

[Hero]

Hi,

Don't forget cost, fabrication and testing problems. Standard via is cheaper than microvia. If you need low cost not too high density board you can use standard via instead microvias.

You need to consider soldering process and potentional problems before use microvia. If you have mixed SMT and PTH components in that case you need to use wave soldering process. In this case you will probably have problems with microvias.

If you use microvias you will have more problems with PCB testing because you cannot always put test points on microvias.

If you really don't need microvias don't use them.

In general for bypass capacitor use X7R capacitors, low ESR tantals with power planes and SMT instead DIP packages. This reducing allover serial inductance.

Also take care of choosen logical family or technology to reduce ground bounce. If you don't need high-speed design use slower families or slow slew rate drivers.


Regards

 

[Phil woz ere]

Via in pad will cause manufacturing problems.
1: Larger holes wick the solder away from the pad.
2: Cause thermal differences between pads.
3: Possiblilty of getting black pad effect from the plating/cleaning process.

Also ot should be noted that blind or buried holes are more expensive to produce and the depth they can travel through the board is limited normally to the next layer down in the stack.

If you can, always pull the via hole away from the solder pad.

Phil 8)