Since ISE 8.1i appears to have been released in 2005, you can rule out VHDL 2008. Likely it only supports VHDL 87 and 93, and does not support 2000 or 2002, but that's just my guess.1. Which version of VHDL (VHDL 87, VHDL 93 etc) is supported by Xilinx ISE 8.1i. Also how
to check the same in the tool.
I would doubt it. That 'update' if it existed would make it a new version number. To get the best language support, you would have to download the latest version.2. Can the same version be updated to support the latest version of VHDL? (this may save
me from downloading the large sized new versions of Xilinx ISE).
1. Which version of VHDL (VHDL 87, VHDL 93 etc) is supported by Xilinx ISE 8.1i. Also how
to check the same in the tool.
2. Can the same version be updated to support the latest version of VHDL? (this may save
me from downloading the large sized new versions of Xilinx ISE).
Very very badly, basically don't bother using any '93. ;-)VHDL 93 - and badly.
Actually they said they would stop on 14.x and then later made it specifically 14.7. So ISE 14.7 is the last version and it does not support any VHDL 2008.ISE 14.1 will be the last ISE and ISE will no longer get any updates. 14.1 does not support 2008.
Vivado Does support some of VHDL 2008.
I'd be surprised they would even do that much. I'd be really surprised if they had a build environment still setup that would support creating a patch for ISE 8.1i.If you buy millions worth of their chips they may give you a patch to fix specific bugs in a specific version, but if you're anyone else - you get what you're given.
VivadoAlso, is there any alternate tool for implementing VHDL 2008 on Xilinx FPGAs pls.?
OK. I suppose you mean I should use synplify as synthesis tool and modelsim as simulation tool. right? And I can simply integrate them with ISE by setting the exe path for these two in it. (Pls ratify). Which is the minimum version of the tools required for VHDL 2008 pls. And do you know of any simple tutorial for using these three tools together?
Thanks,
Arvind Gupta
The way we used it (pre-XST) was to run Synplify as a standalone project, then take the EDIF file output and start an ISE project that used an EDIF file as input. I've always run simulation separately from the vendors tools, I even do that now when I'm using Vivado's simulator.
What exactly do you want VHDL 2008 to do for you? Most of the added features only really help with testing and verification, and none of these are supported by ISE or Vivado. The only added features are utilities things (like case?, generate changes etc) that you can actually work around with '93 anyway. Stuff that would actually be useful (like the fixed point packages) are still not included or supported - you still have to manually import the '93 compatibility version from here: www.vhdl.org/fphdl
Modelsim does have almost full 2008 support (it doesnt support local package declarations though - and no roadmap to support the feature :/ )
Afaik, synplify does have 2008 support - but again - what do you need? There is NOTHING you can do with 2008 for synthesis you cannot do somehow in '93
Though the majority of the code in the book can be easily compiled using '93 and/or '05. I recall seeing a few spots where you would have to use 2008 or otherwise modify the code.a book by Pedroni (Circuit Design and Simulation with VHDL; 2nd edition). It contains codes using VHDL 2008.
Though the majority of the code in the book can be easily compiled using '93 and/or '05. I recall seeing a few spots where you would have to use 2008 or otherwise modify the code.
Yeah, I meant '02.Being a pedant - I assume you mean '93/'02 - there is no VHDL 2005 standard - that's SystemVerilog.
Either way - 2002 only adds protected types which are of no use for synthesis, so you're still stuck with '93.
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?
We use cookies and similar technologies for the following purposes:
Do you accept cookies and these technologies?