vhdl ==> verilog(want to learn verilog presently using vh

s3034585 · Feb 28, 2007

Hi guys
can any one tell me how different is verilog from vhdl. i have been using vhdl for quiet a while and now i want to learn verilog. are they totaly diff or my vhdl understanding will be helpfull to learn....

let me know ur opinions on it..

thanks
tama

ramkimtech · Mar 2, 2007

hi,

verilog and vhdl are not that different but the syntax will change as the language is changing and u can read verilog synthesis by samir palnitkar or book by cillette on verilog these two r the best books for verilog

vhdl ==> verilog(want to learn verilog presently using vh

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vhdl ==> verilog(want to learn verilog presently using vh

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