munchies
Newbie level 3
I am attempting to create a simple block of hardware, that takes 3 inputs (a, b and c) and outputs a*b + c.
Assuming the inputs are all 8 bit, and the output will need to be 16 bit I have created this code.
It compiles with no issues, however it gives errors when synthesizing:
and the same error up to c_int_input(15)
and the same error to y(0)
and the same error to y(15)
Can any of you help point me towards where the issue is? What have I done wrong and how can I solve this?
I am fairly inexperienced in this, so forgive me.
Assuming the inputs are all 8 bit, and the output will need to be 16 bit I have created this code.
Code:
LIBRARY ieee;
USE ieee.std_logic_1164.ALL;
USE ieee.numeric_std.ALL;
ENTITY IPCoreABplusC IS
GENERIC (wordsize: NATURAL := 8);
PORT (a, b, c : IN STD_LOGIC_VECTOR (wordsize - 1 DOWNTO 0);
clk : in STD_LOGIC;
clear : in STD_LOGIC;
y : OUT STD_LOGIC_VECTOR (2 * wordsize - 1 DOWNTO 0)
);
END IPCoreABplusC;
ARCHITECTURE rtl OF IPCoreABplusC IS
SIGNAL a_int, b_int, c_int : STD_LOGIC_VECTOR (wordsize - 1 DOWNTO 0);
SIGNAL c_int_input : STD_LOGIC_VECTOR (2 * wordsize - 1 DOWNTO 0);
SIGNAL ab_product : unsigned (2 * wordsize - 1 DOWNTO 0);
SIGNAL y_int : unsigned (2 * wordsize - 1 DOWNTO 0);
BEGIN
PROCESS (clk, clear)
BEGIN
IF (clear = '1') THEN
a_int <= (OTHERS => '0');
b_int <= (OTHERS => '0');
c_int <= (OTHERS => '0');
c_int_input <= (OTHERS => '0');
ab_product <= (OTHERS => '0');
y <= (OTHERS => '0');
y_int <= (OTHERS => '0');
ELSIF (clk'event AND clk = '1') THEN
a_int <= a;
b_int <= b;
c_int <= c;
c_int_input <= "00000000" & c_int;
ab_product <= unsigned (a_int) * unsigned (b_int);
y_int <= ( (unsigned (c_int_input))) + unsigned (ab_product);
END IF;
END PROCESS;
y <= STD_LOGIC_VECTOR(y_int);
END rtl;It compiles with no issues, however it gives errors when synthesizing:
Code:
All reachable assignments to c_int_input(8) assign '0', register removed by optimization
Code:
Multiple non-tristate drivers for net y(15) in IPCoreABplusC
Code:
Unresolved tristate drivers for net y(0) in IPCoreABplusCCan any of you help point me towards where the issue is? What have I done wrong and how can I solve this?
I am fairly inexperienced in this, so forgive me.